SECTION 2 HARDWARE DESCRIPTION
6
Z80A to test and reset ZINT* under software control. More on
this later. ZINT also controls which 1K bank of internal memory
is selected for bus access. When memory is switched to the S-
100 bus, the on-board Z80A has asserted SLVACK* and will not
respond to an interrupt. At this time ZINT is used AS internal
address bit 10.
ZRST* is the reset line to the on-board Z80A. It is an output
of IC 1A, a one-shot, which is triggered by writing to this port
while data bit 7 is asserted high.
2.6 DISK PROCESSOR STATUS PORT
The Disk Processor Status Port is an S-100 input port which
allows the host processor to examine the current state of the
Disk Processor. The port responds to the occurrence of pDBIN,
sINP, and a matching port address (BPA* asserted). The following
states can be determined by reading this port.
1. On-board processor state (Run/Halt)
2. Address of the 1K memory window.
The address of the memory
window is determined by reading
the M10, M11, and M12 switch
positions as indicated by
signals SA10, SA11, and SA12.
Table 2-1 shows the relation
between signals SA10-SA12 and
the selected window address.
Processor Status Port
Figure 2-5.
Processor Status Port
The on-board processor state is indicated when reading ZHLT*.
This is the Z80A halt flag. Reading a "0" on data bit 0
indicates that the on-board processor has halted.
2.7 CLOCK GENERATION
The clock signals for the Z80A and FD 1791-01 are generated
onboard by a crystal oscillator, divider and driver. See figure
2-6. The crystal is a fundamental type operating at 8.000 Mhz.
The oscillator is implemented with two sections of IC 3L. A
third section is used to square the output of the oscillator. IC
2M is used to divide the clock. The CLOCK SELECT JUMPER is set
depending on the disk drive to be used.' The FD 1791-01 requires
a 2.000 Mhz clock for 8" drives and a 1.000 Mhz clock for the 5"
drives. The jumper provides for the selection of a additional
divide by 2. With 8" drives the Z80A is run at 4.000 Mhz. With
5" ,drives the Z80A runs at 2.000 Mhz to provide adequate port
(123 Seiten)
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